1. Field of the Invention
This invention relates to the integration of compound semiconductor devices. In particular, the invention relates to a compound semiconductor integrated circuit, in which HEMT-ICs or super high frequency analog ICs are incorporated, and the fabrication method thereof.
2. Description of the Prior Art
Recently, a compound semiconductor FET made of GaAs is drawing attention due to its higher electron mobility than that of Si. In addition, an FET device, called HEMT (High Electron Mobility Transistor), which has a hetero-junction between an AlGaAs layer and a GaAs layer, has been developed. In this device, electrons around the interface between said layers are used as carriers. On comparing this device with a GaAs FET, it has better high-frequency response, lower noise generation rate, and higher output capacity than those of the GaAs FET.
In FIG. 5, the sectional structure of an HEMT is shown according to a prior art of this invention. As shown in this figure, this device is comprised of the following: a semi-insulative GaAs substrate 51; a buffer layer 52 which is formed about a few .mu.m thick on said substrate 51 and has a high resistivity; a un-doped GaAs layer 53, having about 0.2 to 0.3 .mu.m, in which very little impurity is contained; an n type Al.sub.x Ga.sub.1-x As (x=0.3) layer 54 formed on said layer 53; an n+ type GaAs layer 55 formed on said layer 54; a source electrode 56 formed on said layer 55; a drain electrode 57 formed on said layer 55; and a gate electrode 58 formed on said layer 54. In this device, said layer 55 is formed in order to make good contact between layer 54 and electrode 56 or 57. Gate electrode 58 is formed as follows. At first, electrodes 56 and 57 are formed on n+ type GaAs layer 55. Then, a part of layer 55 is recess-etched to expose a surface part of layer 54. An electrode material is then adhered to this exposed area so as to form gate electrode 58.
In said prior art HEMT, said electrodes are bonded by wire to form a super high-frequency device. In this case, especially, the bonding wire for connecting a source electrode with a source pad must be made as short as possible. Otherwise, the source inductance will increase, and the high-frequency characteristics will be deteriorated.
Integration techniques of said devices have also been investigated. In one technique, a hole is formed on substrate 51 in such a way that source electrode 56 is grounded by connecting it with the back surface electrode through said hole. This technique is called "beer hall technique" and can reduce the source inductance. However, substrate 51 is easy to break because it has already been scraped into less than 100 .mu.m thickness. In order to realize said technique, substrate 51 must undergo anisotropic dry etching to remove said 100 .mu.m thickness. Plate 51 is so thin that the execution of this etching is difficult. Thus, the beer hall technique is very difficult to realize.
On the contrary, if source electrode 51 is connected with a source pad by a wire in a usual way, the source inductance increases, thus resulting in the deterioration of the high-frequency characteristics.
As described above, in the prior art compound semiconductor integrated circuit (IC), the reduction of source inductance is essential in order to incorporate an HEMT into an IC. However, the beer hall technique, in which a deep hole is formed through the substrate from the back surface, is very difficult to realize in an actual fabrication process.
On the other hand, in the case of a prior art GaAs analog IC (MMIC), a self by-pass method is often adopted, the method in which a large capacity, ex., 100 pF, of bypass condenser is used. To realize this method, a large capacity chip condenser is connected to the IC from outside. On the other hand, in order to integrate said bypass condenser, an MIM capacitor has been developed.
The MIM capacitor is constructed as follows. On a first metal layer made of Ti, Pt, or Au, a CVD film of about 2000 .ANG. thickness is formed. This film is made of p-type SiN and has dielectric constant 7. Then, a second metal layer is deposited on the CVD film.
FIG. 6 shows the circuit structure of a GaAs analog IC, in which said MIM capacitor is incorporated. In this figure, the gate electrode of a GaAs FET 61 is connected to an input 62, and its drain electrode is connected to an output 63. In addition, the source electrode of GaAs FET 61 is connected to the ground through a resistor 64. A bypass pass condenser 65 is inserted between the source electrode of GaAs FET 61 and the ground. The same resistor 64 is also inserted between the gate electrode of GaAs FET 61 and the ground.
In actuality, said condenser 65 is not required to have a capacity value precisely. However, it must have a large capacity. In order to realize such a large value, a device having a relatively large chip size is required.
To reduce the chip size, the p-SiN film may be formed as a thin film to increase the dielectric constant, and therefore, the capacitance. In this case, however, the first and second metal layers easily causes shorts, thus lowering the yield of devices.